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?2011 fairchild semiconductor corporation 1 www.fairchildsemi.com april 2012 FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch FDBS09H04A_f085a/fdps09h04a_f085a smart high side switch features ? short circuit protection with latch ? current limitation ? overload protection ? thermal shutdown with restart ? overvoltage protection (including load dump) ? loss of ground protection ? loss of supply protection (with external diode for charged ind uctive load) ? very low standby current ? fast demagnetization of inductive loads ? esd protection ? optimized static electromagnetic compatibility ? diagnostic function - proportional load current sense (with defined fault signal in case of ove rload operation, over tem - perature shutdown and/or short circuit shutdown) ? qualified to aec typical applications ? power switch with current sense diagnostic feedback for dc grounded loads ? all types of resistive, inductive, and capacitive loads ? replace electromechanical relays, fuses and dis crete circuits description n channel power fet with charge pump, current controlled input and diagnostic feedback with load current sense, inte - grated in smart trench chip on chip technology. provides embedde d protective functions. to220-7l to263-7l 1 7 ordering information for fairchild?s definition of ?green? eco status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html . part number package operating temperature eco status packing method FDBS09H04A_f085a to263-7l -40 ? c - 150 ? c rohs tape & reel
?2011 fairchild semiconductor corporation 2 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch block diagram input / output esd & ovp protection scis high-side driver overload detection temp. sense uvlo & control logic current sense output voltage detection current limit gate protection charge pump voltage source r bb 4 7 6 2 1 3 vbb out in 5 is pin definitions pin number pin name i/o pin function description 1 out a output to loads; pins 1, 2, 6 and 7 must be externally shorted 2 out a output to loads; pins 1, 2, 6 and 7 must be externally shorted 3 in a input; activates the power switch if shorted to ground 4 vbb p supply voltage; pin 4 and tab are internally shorted 5 is a sense output, diagnostic feedback; pr ovides at norma l operation a sense current proportional to the load current; in case of overload, over tempera - ture and/or short circuit a defined current is provided 6 out a output to loads; pins 1, 2, 6 and 7 must be externally shorted 7 out a output to loads; pins 1, 2, 6 and 7 must be externally shorted
?2011 fairchild semiconductor corporation 3 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch absolute maximum ratings at tj=25? c unless otherwise specified. parameter symbol values unit supply voltage v bb 38 v supply voltage for full s hor t circuit protection 1) v bb 30 v load dump protection v loaddump = u a + v s , u a =13.5v r i =2 ? , r l =1 ? , t d =400ms, in=low or high v loaddump 2) 45 v load current (short-circuit current) i l self-limited a operating temperature range storage temperature range t j t stg -40 - 150 -55 - 150 ? c ? c power dissipation (dc) p tot 81 w inductive load switch-off energy dissipation 3) single pulse, i l =12.5a, l=5mh, v bb =12v, t j =150? c e as 388 mj electrostatic discharge capability (esd) (human body model) is v esd 2 kv in v esd 2 kv vbb, output v esd 5 kv current through input pin (dc) current through current sense pin (dc) i in i is +15, -120 +15, -120 ma input voltage slew rate vbb <= 16v input voltage slew rate vbb > 16v 4) dv bin / d t self-limited 20 v/us notes: 1) short circuit is defined as a combination of remaining resistances and inductances. see schematic on page11. 2) vload dump is setup without the dut connected to the generator. 3) see also diagram on page 11. 4) see also on page 7. slew rate limitation can be achieved by means of using a series resistor rin in the input path. this res is tor is also required for reverse operation. see also page 10.
?2011 fairchild semiconductor corporation 4 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch electrical characteristics at tj=25? c, v bb =12v unless otherwise specified. parameter symbol conditions min. typ. max. unit thermal characteristics thermal resistance rthjc 5) rthja (junction to case) (junction to ambient) device on pcb 6) , smd version only - - - 0.6 70 35 0.8 - 45 k/w load switching capability and characteristics on-state resistance (pin 3 to pins 1, 2, 6, 7) r on v in =0, vbb=5.5v, i l =10a, tj=25? c v in =0, vbb=5.5v, i l =10a, tj=150 ? c v in =0, vbb=12v, i l =10a, tj=25 ? c v in =0, vbb=12v, i l =10a, tj=150 ? c - 5.5 10 5.5 10 9 15 9 15 m ? output voltage drop limitation at small load curr ents (tab to pins 1, 2, 6, 7) v on(nl) tj=-40 - 150 ? c - 35 65 mv nominal load current (tab to pins 1, 5) i l(iso) i l(nom) iso proposal 7) : v on <=0.5v, t c =85 ? c, t j <=150 ? c smd 6) 7) : von<= 0.5v, t a =85 ? c, t j <=150 ? c 38 12 48 14 - - a turn-on time (to 90% v out) turn-off time (to 10% v out) t on t off r l =2.2 ??? t j = -40 - 150 ? c - - 180 150 400 500 us slew rate on (25% to 50% v out ) dv / dt on r l =2.2 ??? t j = -40 - 150 ? c - 0.2 0.45 v/us slew rate off (50% to 25% v out ) -dv / dt off r l =2.2 ??? t j = -40 - 150 ? c - 0.2 0.55 v/us operating parameters operating voltage (vin=0) v bb(on) t j = -40 - 150 ? c 5.5 38 v under voltage shutdown 8) v bb(u) - 1.5 3.5 v under voltage restart of charge pump v bb(ucp) 3.7 5.5 v over voltage protection 9) v z,in i bb =15ma, t j = -40 - 150 ? c 42.5 47.3 - v standby current i bb(off) i in =0, t j = -40 - 120 ? c i in =0, t j = 150 ? c - - 0.8 8 5.3 20 ua reverse battery 10) reverse battery voltage -v bb il=-10a, ris=1k ? - - 18 v on-state resistance (pin 4, tab to pins 1, 2, 6, 7) 8) r on(rev ) vbb=-8v, vin=0, il=-10a, ris=1k ??? tj=25 ? c ? vbb=-8v, vin=0, il=-10a, ris=1k ??? tj=150 ? c vbb=-12v, vin=0, il=-10a, ris=1k ?? ? tj=25 ? c vbb=-12v, vin=0, il=-10a, ris=1k ???t j=150 ? c - - - - 6.1 13 6.1 10 13 18 11.5 17 m ? integrated resistor in v bb line r bb is=1ma, vin=5v @ tj = 125 ? c 65 85 110 ? inverse operation 11) output voltage drop (pin 4, tab to pins 1, 2, 6, 7) 8) -v on(inv) i l =-10a, r is =1k ??? t j =25 ? c i l =-10a, r is =1k ?? t j =150? c - - 800 600 - - mv turn-on delay after inverse operation t d(inv) i l > 0a 8) v in(inv )=v in(fwd) =0v - 1 - ms notes: 5) thermal resistance rth ch case to heatsink (about 0.5... 0.9 k/w with silicone paste) not included! 6) device on 76.2mm * 114mm * 1.57mm glass epoxy pcb. still air conditions. 7) not subject to production test, parameters are calculated from ron and rthjc or rthja. 8) not subject to production test, specified by design. 9) see also von(cl) in circuit diagram page 8. 10) for operation at voltages higher then |16v| please see required schematic on page 9. 11) permanent inverse operation results eventually in a current flow via the intrinsic diode of the power dmos. in this case the de vice switches on with a time delay td(inv) after the transition from inverse to forward mode.
?2011 fairchild semiconductor corporation 5 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch electrical characteristics at tj=25? c, v bb =12v unless otherwise specified parameter symbol conditions min. typ. max. unit protection functions 12) short circuit current limit (pin 4, tab to pins 1, 2, 6, 7) at von=6v 13) 14) i l6(sc) t j =-40? c t j =25 ? c t j =150 ? c - - 85 130 120 110 160 - - a short circuit current limit (pin 4, tab to pins 1, 2, 6, 7) at von=12v 13) i l12(sc) t j =-40? c t j =25 ? c t j =150 ? c - - 55 93 85 73 125 - - a short circuit current limit (pin 4, tab to pins 1, 2, 6, 7) at von=18v 13) 14) i l18(sc) t j =-40? c t j =25 ? c t j =150 ? c - - 41 75 68 61 100 - - a short circuit current limit (pin 4, tab to pins 1, 2, 6, 7) at von=24v 13) i l24(sc) t j =-40? c t j =25 ? c t j =150 ? c - - 20 53 47 41 75 - a short circuit current limit (pin 4, tab to pins 1, 2, 6, 7) at von=30v 13) i l30(sc) t j =-40? c t j =25 ? c t j =150 ? c - - 18 34 31 28 50 -- a short circuit shutdown detection voltage 14) v on(sc) 2.5 3.5 4.5 v short circuit shutdown delay after input current positive slope min. value valid only if ?off-signal? time exceeds 30us t d(sc1) v on > v on(sc) , t j =-40 ~ 150 ? c 370 520 700 us output clamp(inductive load switch off) at vout= vbb-von(cl)(overvoltage) 15) v on(cl) i l =40ma 38.5 41.5 - v thermal overload trip temperature 14) t jt 165 178 - ? c thermal hysteresis 14) ? t jt - 10 - k notes: 12) integrated protection functions are designed to prevent ic destruction under fault conditions described in the data sheet. fa ult conditions are considered as "outside" normal operating range. protection functions are not designed for continuous repetitive operation. 13) short circuit current limit for max. duration of td(sc1), prior to shutdown, see also figures 3.x on page 14 and 15. 14) not subject to production test, specified by design. 15) see also figure 2b on page 14.
?2011 fairchild semiconductor corporation 6 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch electrical characteristics at tj=25? c, v bb =12v unless otherwise specified. parameter symbol conditions min. typ. max. unit diagnostic characteristics current sense ratio, static on-condition k ilis =i l : i is < i is ,min 16) v is < v out -5v, v bin > 4.5v iin =0(e.g. during deenergizing of induc - tive loads) k ilis i l =35a, t j =-40? c i l =35a, t j =25 ? c i l =35a, t j =125? c i l =15a, t j =-40? c i l =15a, t j =25 ? c i l =15a, t j =125? c i l =2.5a, t j =-40? c i l =2.5a, t j =25 ? c i l =2.5a, t j =125 ? c i l =0.5a, t j =-40? c i l =0.5a, t j =25 ? c i l =0.5a, t j =125 ? c - 11000 11000 11000 9300 10500 11000 7800 8200 8000 5800 7700 8100 - 13200 13200 13275 13250 13000 13000 12900 13100 13400 13450 12500 13000 13700 - 15000 15000 15000 18000 1 7000 16000 18200 18500 18850 17900 18500 19200 - - sense current under fault conditions 17) i is,fault von > 1v, typ t j = -40 - 150 ? c 3.5 5.2 7.5 ma sense saturation current i is,lim von < 1v, typ t j = -40 - 150 ? c 3.5 5.8 8.5 ma fault-sense signal delay after input current positive slope t delay(fault) von > 1v, typ t j = -40 - 150 ? c 350 500 650 us current sense leakage current i is(ll) i in = 0 - 0 0.5 ua current sense offset current i is(lh) v in = 0, i l <= 0 - 0 1 ua minimum load current for sense functionality i l(min) v in = 0, t j = -40 - 150 ? c 70 - - ma current sense settling time to i isstatic after input current positive slope 18) t son(is) i l = 0 --> 20a, t j = -40 - 150 ? c - 300 650 us current sense settling timeduring on condition 18) t slc(is) i l =10 --> 20a ,t j =-40 ~ 150 ? c - 50 100 us overvoltage protection v z,is i bb = 15ma, t j = -40 - 150 ? c 42.5 47.3 - v input required current capability of input switch i in(on) t j = -40 - 150 ? c - 1.5 3.0 ma input current for turn-off i in(off) t j = -40 - 150 ? c - - 15 ua notes: 16) see also figures 4.x and 6.x on page 15 and 16. 17) fault conditions are overload during on (i.e. von>1v typ.), over temperature and short circuit; see also truth table on pag e 7 . 18) not subject to production test, specified by design.
?2011 fairchild semiconductor corporation 7 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch application information 1. truth table sense current under fault conditions input current level output level current sense normal operation l h l h ? 0 ( i is(ll) ) nominal overload 19) l h l h ? 0 ( i is(ll) ) i is,fault short circuit to gnd 20) l h l l ? 0 ( i is(ll) ) i is,fault over temperature l h l l ? 0 ( i is(ll) ) i is,fault short circuit to v bb l h h h ? 0 ( i is(ll) ) < nominal 21) open load l h z h ? 0 ( i is(ll) ) ? 0 ( i is(lh) ) l = ? low ? level, z = high impedance, potential depends on external circuit, h = ?high? level 2.terms r is is in out v bb v is v bb v bis v out i is v on v bin v in i in i l i bb 1,2,6,7 4 5 3 r in notes: 19) overload is detected at the following condition: 1v (typ.) < von < 3.5v (typ.). see also page 10. 20) short circuit is detected at the following co n dition: von > 3.5v (typ.). see also page 11. 21) low ohmic short to vbb may reduce the output current il and therefore also the sense current iis.
?2011 fairchild semiconductor corporation 8 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch 3. detailed function blocks 3.1 input circuit (esd protection) esd zener diode: 47.3v typ., max 15ma zd v bin v in i in r bb v bb v z,in 3.2 current sense output i is,fault r bb i is v z,is v bb is v is r is v z,is = 47.3v ( typ.), r is = 1k ? nominal (or 1k ? /n, if n devices are connected in parallel). i s = i l /k ilis can be only driven by the inter - nal circuit as long as v out - v is > 5v. therefore ris should be less than vbb 5v ? 8.5ma -------------------------- note: for large values of r is the voltage vis can reach almost v bb . see also over voltage protection. if you don't use the current sense output in your application, you can leave it open. 3.3 inductive and over voltage output clamp v on is clamped to v on(cl) = 41.5v typical v z1 v bb out v on
?2011 fairchild semiconductor corporation 9 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch 3.4 overvoltage protection of logic part v z,in v z,is logic r bb r is r v v z,vis r in is in v bb out r bb = 85 ? typ., v z,in = v z,is = 47.3v typ., r is = 1k? nominal. note that when over voltage exceeds 47.3v typ. a voltage above 5v can occur between is and gnd, if r v , v z,vis are not used. 3.5 reverse battery protection r bb r is r in is in v bb out logic r l r is typ. 1k ?? add r in for reverse battery protection in application with vbb above 16v; 1 r i n --------- 1 r is ------- - + 0.082a v bb 9v ? --------------------------- ? to minimize power dissipation at reverse battery operation, t he overall current into the in and is pin should be about 82ma. th e cur - rent can be provided by using a sm all sign al diode d in parallel to the input swit ch, by using a mosfet input switch or by prop erly adjusting the current through r is . since the current via rbb generates additional heat in the device, this has to be taken into account in the overall thermal consideration.
?2011 fairchild semiconductor corporation 10 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch 3.6 inverse load current operation r is is in out v bb v is v bb + - v in -i l = v out + - i is the device can be operated in inverse load current mode (v out > v bb > 0v). the current sense feature is not available during this kind of operation (i is = 0). in case of inverse operation the intrinsic drain so urce diode is eventually conduc ting resulting in consider - ably increased power dissipation. the tr ansition fr om inverse to forward mode can result in a delayed switch on. note: temperature protection during inverse load current operation is not possible! 3.7 vbb disconnect with energized inductive load is in out v bb v d v zl v bb provide a current path with load current capabili ty by using a diode, a z-diode, or a varistor(v zl + vd < 38v if r in = 0). for higher clamp voltages currents at in and is have to be limited to 120 ma. 3.8 overload detection fault condition: v on > 1v typ. detection logic v bb out v on
?2011 fairchild semiconductor corporation 11 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch 3.9 short circuit r is is in out v bb -i l(t) = i in l sc z l v bb r sc 5uh 10mohm sc fault condition: v on > v on(sc) (3.5v typ.) and t > t d(sc) (typ. 650us) short circuit is a combination of primar y and secondary impedances and resistances. 3.10 inductive load switch-off energy dissipation r is is in out v bb -i l(t) = i in l r l e r e l e load e bb e as v bb z l { energy stored in load inductance: e l 12 ? li l 2 ?? = while demagnetizing load inductance, the energy dissipated in mosfet is e as e bb e l e r ?+ v ? on cl ?? i l t ?? dt ? == with an approximate solution for rl > 0 v out(cl) = v o n(cl) - vbb: e as i l l ? 2r l ? -------------- - v on cl ?? ?? 1 i l r l ? v out cl ?? ----------------------------- + ?? ?? ln =
?2011 fairchild semiconductor corporation 12 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch 3.11 maximum allowable load inductance for a single switch off 1 10 100 0.01 0.1 1 10 100 1000 i_l[a] l[mh] l=f(i l ) ; t j = 150 ? c, vbb=12v, r l = 0 ?
?2011 fairchild semiconductor corporation 13 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch typical application circuit m diagnosis in control is vbb out ris rin r bb ris 1k r in 1k is 5 in 3 v bb 4 out 1,2,6,7 load r 2 off on bat c mcu r 4 3k r1 100 r 3 output adc 5.1v *2 *1 *1 *3 1) ris and rin is recommended as 1k 2) put diode or capacitor between load to protect device or to remove noise. 3) for reverse battery protection function, r1 should be used less than 120 ??? at -18v.
?2011 fairchild semiconductor corporation 14 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch timing diagrams figure 1a. switching a resistive load, change of load current in on-condition figure 2a. switching motors and lamps figure 2b. switching an inductive load the sense signal is not valid during a settling time after turn-on/off and after change of load current as long as v bis < v z,is the sense current will never exceed i is,fault and/or i is,lim i in i l v out i is 90% 10% t on dv/dt on t off t slc(is) load1 load2 t son(is) t soff(is) dv/dt off t i in i l v out i is t i in i l v out i is v on(cl) t figure 3a. typical current limitation characteristic in case of v on > v on(sc) (typ.3.5v) the device will be switched off by internal short circuit detection 0 10 20 30 [v] 20 40 60 80 100 120 v on i l(sc) [a]
t d(sc1) v on > v on(sc) i in i l i is t m tdealy(fault) i is,fault t t d(sc2) t i in i l v on i is 1v typ i is,fault i l /k ilis figure 3c. short circuit type two: shut down by short circuit detection, reset by i in =0 figure 4a. over temperature reset if t j < t jt figure 3b. short circuit type one: shut down by short circuit detection, reset by i in =0 shut down remains latched until next reset via input figure 4b. overload reset if t j < t jt i in i is v out t j t i is,fault auto restart tdelay(fault) i in i l v bb -v out i s r on *i l,lim v on =1v typ. i is,lim i is,fault i l /k ilis t ?2011 fairchild semiconductor corporation 15 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch
v bin(u) v on(cl) v in = 0 v bb v out v bb(ucp) v on(cl) i in = 0 0 dynamic,short undervoltage not below v bin(u) figure 5. under voltage restart of charge pump and over voltage clamp figure 6a. current sense versus load current figure 6b. current sense ratio figure 7. output voltage drop versus load current 2 4 6 8 10 12 14 i l v on 0.05 0.1 [v] [a] 0 1020304050 i l i is i l,lim i is,lim [a] [ma] 1 2 3 4 i l(min) i is(lh) 0 510 20 15 25 30 10000 20000 30000 i l [a] k lilis ?2011 fairchild semiconductor corporation 16 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch
?2011 fairchild semiconductor corporation 17 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch package dimensions
?2011 fairchild semiconductor corporation 18 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch
?2011 fairchild semiconductor corporation 19 www.fairchildsemi.com FDBS09H04A_f085a/fdps09h04a_f085a FDBS09H04A_f085a/fdps09h04a_f 085a smart high side switch

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